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From: Patrick Wong <patrick.nwtec@gmail.com>
Date: Thu, 31 Jul 2025 21:11:47 -0700
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Message-ID: <CAFwUL1+pUMQAikqxg3MKXJ6Fvhzy1gE3==RPKeP3xvr2egxevw@mail.gmail.com>
Subject: Re: MDS-ROM-SIM-100
To: SBC-85 <craig@sbc-85.com>
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Hi Craig.

Good to hear from you. If you mean tomorrow, August 1, unfortunately, I'm
in Rancho Cordova helping out my family.  Will return by Wednesday, Aug 6.

If you mean September, yes i should be available.

Let me know.  Thanks.

Patrick



On Thu, Jul 31, 2025 at 8:43=E2=80=AFPM SBC-85 <craig@sbc-85.com> wrote:

> Hi Patrick, will you be around the first of next month so I can pick up
> those things i forgot?
>
> On Feb 19, 2025, at 9:00=E2=80=AFAM, Patrick Wong <patrick.nwtec@gmail.co=
m> wrote:
>
> =EF=BB=BF
> Hi Craig,
>
> I'll let you know if I find any info on this or if I find this board.
>
> Best regards,
>
> Patrick Wong
> Northwest Technical Inc.
> 16920 Old County Road
> Brookings, OR  97415
> Tel: 541-469-6644
> Email: patrick.nwtec@gmail.com
> Website: www.multibus-international.com
>
>
> On Tue, Feb 18, 2025 at 5:05=E2=80=AFPM <craig@sbc-85.com> wrote:
>
>> Hi Patrick
>>
>>
>>
>> Made it back to Vancouver, thanks for meeting me yesterday and taking
>> care of that chassis & MDS-800 cover until I get a chance to come back
>> down.  That chassis will fit in my little airplane but the MDS-800 would=
 be
>> a tight squeeze.
>>
>>
>>
>> Here is the catalog cut sheet and a photograph of the MDS-ROM simulator
>> board.  Please let me know if you come across any information on them.  =
I
>> have the boards running from the MDS side, i.e., I have access to the
>> onboard RAM and the next step is to start reverse engineering the interf=
ace
>> for the device under test.  One thing I am trying to figure out first is
>> this business of the operating modes you see in the silkscreen on the bo=
ard
>> in a couple of places.  Any idea what Mode 18 and Mode M could mean?  I
>> have never seen intel use that terminology before.  These boards were
>> designed so you could have up to four of them in a system and continue t=
he
>> memory from one board to the next.  From the MDS perspective, you set th=
e
>> high address nibble in the jumpers in the bottom left plus which board o=
f
>> the four this board is which set the next two address lines down.  From =
the
>> device under test side, the memory could be byte wide or multi-byte and =
I
>> am guessing that is where the Mode 18 or mode M comes in.  in the top ri=
ght
>> corner the user rom is set in octal or it is set to  Mode M.  At this po=
int
>> I am guessing that mode 18 is when the boards were accessed individually
>> for byte-wide memory and Mode M is when all boards were accessed
>> simultaneously for 32-bit wide access.
>>
>>
>>
>> Any insight would be appreciated.
>>
>>
>>
>> Thanks
>>
>> craig
>>
>

--000000000000877a18063b45f58d
Content-Type: text/html; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable

<div dir=3D"ltr">Hi Craig.=C2=A0<div><br></div><div>Good to hear from you. =
If you mean tomorrow, August=C2=A01, unfortunately, I&#39;m in Rancho Cordo=
va helping out my family.=C2=A0 Will return by Wednesday, Aug 6.=C2=A0<div>=
<br></div><div>If you mean September, yes i should=C2=A0be available.</div>=
<div><br></div><div>Let me know.=C2=A0 Thanks.</div><div><br></div><div>Pat=
rick</div><div><br></div><div><br></div></div></div><br><div class=3D"gmail=
_quote gmail_quote_container"><div dir=3D"ltr" class=3D"gmail_attr">On Thu,=
 Jul 31, 2025 at 8:43=E2=80=AFPM SBC-85 &lt;<a href=3D"mailto:craig@sbc-85.=
com">craig@sbc-85.com</a>&gt; wrote:<br></div><blockquote class=3D"gmail_qu=
ote" style=3D"margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,20=
4);padding-left:1ex"><div dir=3D"auto"><div dir=3D"ltr"></div><div dir=3D"l=
tr">Hi Patrick, will you be around the first of next month so I can pick up=
 those things i forgot?</div><div dir=3D"ltr"><br><blockquote type=3D"cite"=
>On Feb 19, 2025, at 9:00=E2=80=AFAM, Patrick Wong &lt;<a href=3D"mailto:pa=
trick.nwtec@gmail.com" target=3D"_blank">patrick.nwtec@gmail.com</a>&gt; wr=
ote:<br><br></blockquote></div><blockquote type=3D"cite"><div dir=3D"ltr">=
=EF=BB=BF<div dir=3D"ltr">Hi Craig,<div><br></div><div>I&#39;ll let you kno=
w if I find any info on this or if I find this board.</div><div><br></div><=
div>Best regards,<br><br>Patrick Wong<br>Northwest Technical Inc.<br>16920 =
Old County Road<br>Brookings, OR =C2=A097415<br>Tel: 541-469-6644<br>Email:=
 <a href=3D"mailto:patrick.nwtec@gmail.com" target=3D"_blank">patrick.nwtec=
@gmail.com</a><br>Website: <a href=3D"http://www.multibus-international.com=
" target=3D"_blank">www.multibus-international.com</a></div><div><br></div>=
</div><br><div class=3D"gmail_quote"><div dir=3D"ltr" class=3D"gmail_attr">=
On Tue, Feb 18, 2025 at 5:05=E2=80=AFPM &lt;<a href=3D"mailto:craig@sbc-85.=
com" target=3D"_blank">craig@sbc-85.com</a>&gt; wrote:<br></div><blockquote=
 class=3D"gmail_quote" style=3D"margin:0px 0px 0px 0.8ex;border-left:1px so=
lid rgb(204,204,204);padding-left:1ex"><div><div lang=3D"EN-US"><div><p cla=
ss=3D"MsoNormal">Hi Patrick<u></u><u></u></p><p class=3D"MsoNormal"><u></u>=
=C2=A0<u></u></p><p class=3D"MsoNormal">Made it back to Vancouver, thanks f=
or meeting me yesterday and taking care of that chassis &amp; MDS-800 cover=
 until I get a chance to come back down.=C2=A0 That chassis will fit in my =
little airplane but the MDS-800 would be a tight squeeze.<u></u><u></u></p>=
<p class=3D"MsoNormal"><u></u>=C2=A0<u></u></p><p class=3D"MsoNormal">Here =
is the catalog cut sheet and a photograph of the MDS-ROM simulator board.=
=C2=A0 Please let me know if you come across any information on them.=C2=A0=
 I have the boards running from the MDS side, i.e., I have access to the on=
board RAM and the next step is to start reverse engineering the interface f=
or the device under test.=C2=A0 One thing I am trying to figure out first i=
s this business of the operating modes you see in the silkscreen on the boa=
rd in a couple of places.=C2=A0 Any idea what Mode 18 and Mode M could mean=
?=C2=A0 I have never seen intel use that terminology before.=C2=A0 These bo=
ards were designed so you could have up to four of them in a system and con=
tinue the memory from one board to the next.=C2=A0 From the MDS perspective=
, you set the high address nibble in the jumpers in the bottom left plus wh=
ich board of the four this board is which set the next two address lines do=
wn.=C2=A0 From the device under test side, the memory could be byte wide or=
 multi-byte and I am guessing that is where the Mode 18 or mode M comes in.=
=C2=A0 in the top right corner the user rom is set in octal or it is set to=
 =C2=A0Mode M.=C2=A0 At this point I am guessing that mode 18 is when the b=
oards were accessed individually for byte-wide memory and Mode M is when al=
l boards were accessed simultaneously for 32-bit wide access.<u></u><u></u>=
</p><p class=3D"MsoNormal"><u></u>=C2=A0<u></u></p><p class=3D"MsoNormal">A=
ny insight would be appreciated.<u></u><u></u></p><p class=3D"MsoNormal"><u=
></u>=C2=A0<u></u></p><p class=3D"MsoNormal">Thanks<u></u><u></u></p><p cla=
ss=3D"MsoNormal">craig<u></u><u></u></p></div></div></div></blockquote></di=
v>
</div></blockquote></div></blockquote></div>

--000000000000877a18063b45f58d--
