Return-Path: Delivered-To: craig@sbc-85.com Received: from gator4254.hostgator.com by gator4254.hostgator.com with LMTP id kHB8LfPTLWSByQEAcizydQ (envelope-from ) for ; Wed, 05 Apr 2023 15:02:59 -0500 Return-path: Envelope-to: craig@sbc-85.com Delivery-date: Wed, 05 Apr 2023 15:02:59 -0500 Received: from mail-pg1-f178.google.com ([209.85.215.178]:46641) by gator4254.hostgator.com with esmtps (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.95) (envelope-from ) id 1pk9LO-000Y0E-Il for craig@sbc-85.com; Wed, 05 Apr 2023 15:02:59 -0500 Received: by mail-pg1-f178.google.com with SMTP id z18so22444481pgj.13 for ; Wed, 05 Apr 2023 13:02:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1680724967; x=1683316967; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=uniR6aik/GqGX9pb/Sw/GbEdILuIzt5PGa+s+EU6Kw8=; b=NkUpnA2pnZBqfHM8sSM3jokRUc2o4/qEUm9gz/ncJzEcnVzcUk0Y5Y7baRsxDQi8XH scVzJoEJ+YwMvGUqPVlgwB7WWVeX5Dovr1rCMfzD8TlQMZqYSKhuZFnOJyNz0PDwbBE8 w/OVuD7N9ydAlD49LQggBxqQ8ajBANWgMiFJ8o40VZFC0x/QQHlGXfwrneN6CPu+3ZMV Q+Qr8pals5xf/i8IPnVhvZ+wlgAat/iTRRD4Ix3U0MBr92C9iizh+5oPzfJ1GcA9HmK9 YpYsP8jAvuKhrrQ2Z1PIoPYRafye6RFk4xy3G4rteu7qics56EPT0DPKjUzowQMwbx9u egIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680724967; x=1683316967; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=uniR6aik/GqGX9pb/Sw/GbEdILuIzt5PGa+s+EU6Kw8=; b=S4RBsIX1Rrjd7oIUutBVFVc+RIDeRXThY9GWRyMcvNvjH7YGZlyN2S+HuKBANeuIdM u5fmP2VMNsphm0YrrEQlxmLrjPEJrSINcR+0Vw+rfnWTUTkHNWGOUVQdKqgyxeuvSWMd tdD1LtoJXbQFg7zcqyq207mwpX29Q1iLpOoC3ZrvuresOyyvTC7MJ3543GmMKCLwqHdH 5Z0BXy/OmKZEwRaAC/86szj2uc9V/uyb+kfWvvSJXDt0GcqkFtfuvAhH4PIYGTYQ4E08 kvX4CzfpmoxrZ85+yYVLV0BWw5OjMOd2oeB4gtwrtBdhZNVAP4CYCSdITUWdDmTNTqTg cLHg== X-Gm-Message-State: AAQBX9drWlLeJnCjwnU4mUQ3tuh7PCtkNFmTZlxpruLTT+IgtjlSiK49 Zf0VrOFvE7V6PhpsjiWsBF9QSHY7Gag4fetg7KjMxpyC X-Google-Smtp-Source: AKy350aRHJbav1N552NHyWFBQ/zsQcmB/s15aaOGRuL5nD7xBZmh0ajqBnD+li5FmrtoFUp2WRXOaoqqd4/YLRalcq8= X-Received: by 2002:a05:6a00:a20:b0:627:fb45:9279 with SMTP id p32-20020a056a000a2000b00627fb459279mr2600277pfh.0.1680724966611; Wed, 05 Apr 2023 13:02:46 -0700 (PDT) MIME-Version: 1.0 References: <6C8B34A7-C28A-4539-A7DB-9DE5489F77CB@sbc-85.com> In-Reply-To: <6C8B34A7-C28A-4539-A7DB-9DE5489F77CB@sbc-85.com> From: Mattis Lind Date: Wed, 5 Apr 2023 22:02:35 +0200 Message-ID: Subject: Re: Intellec 8/80 reading paper tapes? To: SBC-85 Cc: Sid Jones , Jon Hales Content-Type: multipart/alternative; boundary="00000000000099a27c05f89c4619" X-Spam-Status: No, score=-0.2 X-Spam-Score: -1 X-Spam-Bar: / X-Spam-Flag: NO --00000000000099a27c05f89c4619 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hello again! I patched the code with the snippet I wrote above and programmed an empty Intel 1702A chip and it worked! So, yes, the original code was buggy. I wonder who left it there? Has someone modified the Intel code or was it buggy when it came from Intel? Anyway I managed to get my little paper tape emulator working. As soon as you type the R command the paper tape emulator prints out a menu on the terminal where one can choose from the files on the SD-card. Pressing the number for the file that one wants to upload followed by Enter starts the upload. As soon as the upload competes one is back in monitor mode and can enter monitor commands. I am thinking of adding features so that files can be downloaded from the Intellec 8. Pressing BREAK (convenient on a real Teletype, not so much in a terminal emulator...) brings up the menu where the filename can be chosen. Then the file download would start and when finished one press BREAK again to close the file properly. Another similar feature would be that there can be a passthrough mode where a real teletype is used for uploading files. As the file goes through the paper tape emulator it would store it on the internal SD card as well. Next to go however is to port Peter Jennings Microchess to the Intellec 8. It is just a matter of modifying the I/O-routines. Should be straight forward I think. Are there any other fun programs to run on a smal system with only 8k of RAM? Programs that can run on the bare metal. I can think of BASIC. The 4k Altair BASIC should be possible to port. Is there a small Forth available? /Mattis Den tis 4 apr. 2023 kl 11:08 skrev SBC-85 : > Doesn=E2=80=99t surprise me at all. The code made no sense without the I= N reading > the port. > > On Apr 4, 2023, at 12:14 AM, Mattis Lind wrote: > > =EF=BB=BF > Hello! > > I just compared the code for version 3 of the monitor ( > https://www.retrotechnology.com/restore/beech_mon80.lst) and it has the > IN instruction: > > 01223 3EA5 E5 CIN2 PUSH H ;3EA5-E5 > 01224 3EA6 21 0003 LXI H,IOBYTE ;3EA6-21 03 00 * > 01225 3EA9 7E MOV A,M ;3EA9-7E > 01226 3EAA E6 0C ANI 00CH ;3EAA-E6 0C > 01227 3EAC C2 3ED1 JNZ A3ED1 ;3EAC-C2 D1 3E * > 01228 3EAF 3E 09 MVI A,009H ;3EAF-3E 09 > 01229 3EB1 D3 01 OUT 001H ;3EB1-D3 01 > 01230 3EB3 3E 08 MVI A,008H ;3EB3-3E 08 > 01231 3EB5 D3 01 OUT 001H ;3EB5-D3 01 > 01232 3EB7 26 FA MVI H,0FAH ;3EB7-26 FA > 01233 3EB9 DB 01 A3EB9 IN 001H ;3EB9-DB 01 > 01234 3EBB E6 01 ANI 001H ;3EBB-E6 01 > 01235 3EBD CA 3ECB JZ A3ECB ;3EBD-CA CB 3E * > 01236 3EC0 CD 3D25 CALL A3D25 ;3EC0-CD 25 3D * > 01237 3EC3 25 DCR H ;3EC3-25 > 01238 3EC4 C2 3EB9 JNZ A3EB9 ;3EC4-C2 B9 3E * > 01239 3EC7 AF A3EC7 XRA A ;3EC7-AF > 01240 3EC8 37 STC ;3EC8-37 > 01241 3EC9 E1 POP H ;3EC9-E1 > 01242 3ECA C9 RET ;3ECA-C9 > 01243 ;************ > 01244 3ECB DB 00 A3ECB IN 000H ;3ECB-DB 00 > 01245 3ECD 2F CMA ;3ECD-2F > 01246 3ECE B7 ORA A ;3ECE-B7 > 01247 3ECF E1 POP H ;3ECF-E1 > 01248 3ED0 C9 RET ;3ED0-C9 > > > Another difference is that the H value is set to FAh instead of FFh and t= hat the delay routine is called only once. > > I will make a check this evening just to be sure: Stepping through until = I get to the JZ instruction and then making sure nothing has been received = by the UART. Let's see if that branch is taken or not. > > > It sure does look like a bug. But why did they introduce that bug in vers= ion 4? Generally this would not be code that there was any reason to change= . It has been there in several revisions of the code. Version 3 looks the s= ame as version 2, while version 1.0 and 1.2 are very different. > > > Just to explain the behaviour of the Reader-run signal: > > > Reader run is generated by a flip-flop constructed out of two 7400. One o= f the inputs for this flip-flop is the received data. Thus a start-bit woul= d reset the flip-flop which makes sense. The other input is the data coming= from the inverting control register. To set the flip-flop the output has t= o go low and writing a 1 to bit 0 of the control register accomplishes that= . Now there is one more thing to it. The output of the flip-flop is gated i= n a 7400 with the set-signal from the control-register. To enable the reade= r relay the signal from this last NAND gate has to be low. This would lower= the base of a 2n2907 and then let the current flow through the coil. > > When setting bit 0 to 1 the output of the set-signal will be low, causing= the flip-flop to output high. This is NANDed with the set-signal to produc= e a high. But when bit 0 is set to 0 the output set-signal will be high and= the flip-flop is still maintaining its high output, thus producing a low o= utput of the NAND gate which will then cause current to flow in the reader = relay coil. > > > /Mattis > > > Den m=C3=A5n 3 apr. 2023 kl 23:56 skrev : > >> =E2=80=A6 a couple of things I forgot=E2=80=A6. >> >> >> >> which interface board are we talking about controlling the TTY? does i= t >> just have the TTY interface or does it also have a tape reader interface= ? >> >> >> >> the TTY tape reader would only be at 110 baud, maybe 300. either way, >> the 8080 had no trouble keeping up with a standard TTY and I think sendi= ng >> the 08 to the command register to only advance the tape one character wo= uld >> be unnecessary. so maybe the MVI A,08H was a bit of legacy code from th= e >> 8008 that just didn=E2=80=99t get removed? the high speed reader may be= more >> difficult for the 8080 to keep up without stopping the tape, especially >> with a UART doing the dirty work for the 8080. >> >> >> >> since you proposed it again, --the 8080 OUT does not change the value of >> the accumulator or any flags. >> >> >> >> *From:* craig@sbc-85.com >> *Sent:* Monday, April 3, 2023 2:30 PM >> *To:* 'Mattis Lind' >> *Cc:* 'Sid Jones' ; 'Jon Hales' < >> jonhales@gmail.com> >> *Subject:* RE: Intellec 8/80 reading paper tapes? >> >> >> >> Hi Mattis, >> >> >> >> what caught my eye was your comment about sending the 08 out to the port >> when that makes no sense. >> >> >> >> >> >> RI0: MVI A,BS ;3EC5-3E 08 >> OUT TTYS ;3EC7-D3 01 <-- SET READER RUN >> MVI H,0FFH ;3EC9-26 FF >> ANI 001H ;3ECB-E6 01 <-- AND A with 01h But isn't A just >> 08h? >> JZ RI2 ;3ECD-CA DE 3E <-- Jump on 0. Always take this? >> CALL DELAY ;3ED0-CD 37 3D <-- When do we get here? >> CALL DELAY ;3ED3-CD 37 3D >> DCR H ;3ED6-25 >> JNZ RI0 ;3ED7-C2 C5 3E <-- It makes no sense looping if we >> aren't reading some condition! >> >> >> >> so lets look at that part of the code.. you say there isn=E2=80=99t an I= N >> instruction, but I just don=E2=80=99t see this making sense without it= =E2=80=A6 >> >> >> >> there is only one bit difference between an out and in instruction. Out >> is D3 and IN is DB. so if bit 3 were misread as a low when it was high, >> then that out TTYS would become an IN TTYS. but then the instruction >> before doesn=E2=80=99t make sense to load the accumulator and then ignor= e it. so >> something is fishy in that region of code >> >> >> >> I glanced at the intellect 8 mod 80 user manual (pasted below), on that >> bit 3 enables/disables a PROM of some sort=E2=80=A6 I didn=E2=80=99t dig= further, but it >> seems that bit does something and should be left set. it was just set = in >> this instruction a few bytes earlier >> >> MVI A,HT ;3EC1-3E 09 >> OUT TTYS ;3EC3-D3 01 <-- CLEAR READER RUN >> >> >> >> according to the manual, the 09 will enable the prom and the reader, and >> 08 will disable the reader but leave the prom enabled. So, in practice, >> the reader is turned on for a moment and then turned off. are your set >> reader run and clear reader run comments backwards? 09h starts the read= er, >> 08h stops the reader. >> >> >> >> I stand by a missing IN instruction. Either the OUT was read incorrectl= y >> and is actually an IN and the MVI A,08 does nothing, or another bit or t= wo >> was read wrong and the MVI A,08 is something else entirely. >> >> >> >> >> >> >> >> >> >> >> >> >> >> *From:* Mattis Lind >> *Sent:* Monday, April 3, 2023 1:19 PM >> *To:* craig@sbc-85.com >> *Cc:* Sid Jones ; Jon Hales < >> jonhales@gmail.com> >> *Subject:* Re: Intellec 8/80 reading paper tapes? >> >> >> >> Hello Craig! >> >> >> >> This is the actual monitor that came with my system. Disassembled by Bil= l >> Beech. The full disassembly can be found here: >> >> >> >> https://www.retrotechnology.com/restore/mon80_v4.asm >> >> >> >> I double checked the instruction opcodes while single stepping through >> and it matches just fine so I think the disassembly is faithful to the >> original. >> >> >> >> Actually BS/HT are not characters since it goes into the control registe= r >> at IO address 1. I have no idea why bit 3 is set since there is nothing = on >> the IO board that is using that particular bit. 01h should have been >> sufficient. >> >> >> >> Writing a 0 to bit 0 in the control register will reset the reader run >> signal and writing a 1 to bit 0 of the control register will set the rea= der >> run signal. >> >> I fully agree that there should have been an IN TTYS just before the ANI= . >> Then I would have understood everything. Now there is none. >> >> >> >> The Data Available signal in the status register is actually the inverte= d >> sense since the Intel 8234 has inverting outputs meaning that bit 0 of t= he >> status register has 0 if there is data available and 1 if there is no da= ta >> available. >> >> >> >> My only explanation is that in fact the status register is read into the >> A register by the OUT instruction, then anded with 01h and subsequently >> acted upon when the JZ is executed. Since we in fact have data in the UA= RT >> register the DA status bit will read 0 and the jump will be taken. >> >> >> >> But it should not be possible if the OUT only do OUT and nothing else, o= r? >> >> >> >> Perhaps someone can do an experiment on some other hardware to see what >> is going on? >> >> >> >> /Mattis >> >> >> >> >> >> Den m=C3=A5n 3 apr. 2023 kl 21:50 skrev : >> >> Hi Mattis, >> >> >> >> I must have fallen asleep in class and just woke up when the teacher >> called me=E2=80=A6. where did this code come from? >> >> >> >> I have not taken a careful look, really just looked at your comments and >> confusion set in right when I got to RI0 where you point out that moving >> the BS character into A and then ANI with 0x01 makes absolutely no sense= . >> How much confidence do we have in this code? is there an original list f= ile >> for this code? If this is code that was read from a ROM and not actual= ly >> tested, is it a misread or bit rot? >> >> >> >> to answer your question, the OUT instruction leaves register A unchanged >> and affects no flags. >> >> >> >> looking at the code, everything in the RI: and RI0: makes sense at first >> blush. if I had to accuse something, I would say there is a missing IN >> TTYS instruction before the ANI 01H. is that possible? >> >> >> >> regards >> >> craig >> >> >> >> >> >> >> >> *From:* Mattis Lind >> *Sent:* Monday, April 3, 2023 11:05 AM >> *To:* SBC-85 ; Sid Jones ; >> Jon Hales >> *Subject:* Intellec 8/80 reading paper tapes? >> >> >> >> Hello! >> >> >> >> It has been a while. I got side tracked with another project. A guy >> donated a SWTPC 6809 machine with a terminal and floppy drives. Nice lit= tle >> system, but not working yet and very dusty when I received it so it >> required some attention. >> >> >> >> After I got the Intellec 8 running I designed a small current-loop >> interface for it and thought a paper tape simulator would be a good idea= . >> An STM32 controller with a small SD card would allow me to have a bunch = of >> images to select from. As soon as the Intellec 8 asserts the reader run >> signal a menu would be printed on the terminal connected to the paper ta= pe >> emulator showing what files there are on the SD card so you could select >> one for downloading into the Intellec 8. >> >> >> >> Until here everything works fine. But when the reading process starts, >> it stops after 20 characters. I did a try to single step through the cod= e >> while receiving characters and then it worked much better. I wasn't able= to >> finish the entire file, but it got well past 20 characters of input unti= l I >> got too tired of pressing the STEP switch repeatedly. >> >> >> >> So what could cause this? This all sounds like some kind of timing >> problem. But I wanted to be sure before re-designing the software. >> >> >> >> I now single stepped through the code while keeping track of it in the >> assembly listing I had of the monitor running. >> >> >> >> This is the section which is pulsing the Reader Run and reading one byte= : >> >> >> >> RI: PUSH H ;3EB7-E5 <-- ENTRY >> LXI H,IOBYTE ;3EB8-21 03 00 >> MOV A,M ;3EBB-7E >> ANI 00CH ;3EBC-E6 0C >> JNZ RI3 ;3EBE-C2 E4 3E >> MVI A,HT ;3EC1-3E 09 >> OUT TTYS ;3EC3-D3 01 <-- CLEAR READER RUN >> >> RI0: MVI A,BS ;3EC5-3E 08 >> OUT TTYS ;3EC7-D3 01 <-- SET READER RUN >> MVI H,0FFH ;3EC9-26 FF >> ANI 001H ;3ECB-E6 01 <-- AND A with 01h But isn't A just >> 08h? >> JZ RI2 ;3ECD-CA DE 3E <-- Jump on 0. Always take this? >> CALL DELAY ;3ED0-CD 37 3D <-- When do we get here? >> CALL DELAY ;3ED3-CD 37 3D >> DCR H ;3ED6-25 >> JNZ RI0 ;3ED7-C2 C5 3E <-- It makes no sense looping if we >> aren't reading some condition! >> >> RI1: XRA A ;3EDA-AF >> STC ;3EDB-37 >> POP H ;3EDC-E1 >> RET ;3EDD-C9 >> >> RI2: IN TTYD ;3EDE-DB 00 <-- Get here then and read data >> CMA ;3EE0-2F >> ORA A ;3EE1-B7 >> POP H ;3EE2-E1 >> RET ;3EE3-C9 <-- Return to caller. >> >> >> >> The routine above is called from this small routine: >> >> >> >> RIX: CALL RI ;3F12-CD B7 3E >> JC LER ;3F15-DA 67 3C <-- If carry we bail out to 3C67h >> ANI 07FH ;3F18-E6 7F >> >> RET ;3F1A-C9 >> >> >> >> >> >> The code at 3C67 simply prints a '*' and jumps to the START of the >> monitor which prints a CRLF and a '.' then it is the command interpreter >> again. >> >> >> >> The IO board has two addresses. 0 and 1 >> >> >> >> 0 is the data buffer >> >> 1 is the control / status register. >> >> >> >> Status register has bits allocated as follows: >> >> >> >> 0 DA - DataAvailable >> >> 1 OR - OverRun >> >> 2 TBMT - TransmitterBuffereMpTy >> >> 3 FE - FramingError >> >> 4 PE - ParityError >> >> >> >> Control register has one single bit used: >> >> >> >> 0 Reader Run >> >> >> >> I am not an 8080 assembly specialist. I think I can read it decently but >> the code above puzzles me a bit and I think it has to do with why it >> doesn't work. >> >> >> >> So I ask you 8080 experts out there if you could give some help >> understanding what is happening! >> >> >> >> BTW. The full disassembly is here: >> https://www.retrotechnology.com/restore/mon80_v4.asm >> >> I sent the ROMs and Bill Beech ran it through his disassembler. >> >> >> >> There is a delay routine that loops 256 times through two delay routines >> to give some delay but since we are single stepping we never get into th= at >> one I guess. But how can the A register have anything other than 08h in = it >> after the OUT instruction? >> >> >> >> Unless of course the OUT instruction does an implicit input into the A >> register after the OUT?? >> >> Then it would read the DA flag and it makes much more sense. >> >> >> >> But I have not seen any 8080 manual stating that the OUT instruction als= o >> does an IN implicitly. >> >> >> >> What am I missing? How should I interpret the assembly code? >> >> >> >> If it indeed turns out that the STM32 is slow at times, it is indeed >> looping through quite some code when polling the reader run bit and also >> reads stuff off the SD-card, then I will probably enable hardware handsh= ake >> on the UART and hopefully it will solve it. But understanding if this is >> the root cause or not would be helpful. >> >> >> >> Any input would be very helpful! >> >> >> >> Thanks! >> >> >> >> /Mattis >> >> >> >> >> >> --00000000000099a27c05f89c4619 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hello again!

I patched the code with th= e snippet=C2=A0I wrote above and programmed an empty Intel 1702A chip and i= t worked!

So, yes, the original code was buggy.=C2= =A0 I wonder who left it there? Has someone modified the Intel code or was = it buggy when it came from Intel?

Anyway I managed= to get my little paper tape=C2=A0emulator working. As soon as you type the= R command the paper tape=C2=A0emulator=C2=A0 prints out a menu on the term= inal where one can choose from the files on the SD-card. Pressing the numbe= r for the file that one wants to upload followed by Enter starts the upload= .

As soon as the upload competes one is back in mo= nitor mode and can enter monitor commands.

I am th= inking of adding features so that files can be downloaded from the Intellec= =C2=A08. Pressing BREAK (convenient on a real Teletype, not so much in a te= rminal emulator...) brings up the menu where the filename can be chosen. Th= en the file download would start and when finished one press BREAK again to= close the file properly. Another similar feature would be that there can b= e a passthrough mode where a real teletype is used for uploading files. As = the file goes through the paper tape emulator it would store it on the inte= rnal SD card as well.

Next to go however is to por= t Peter Jennings Microchess to the Intellec=C2=A08. It is just a matter of = modifying the I/O-routines. Should be straight forward I think.
<= br>
Are there any other fun programs to run on a smal system with= only 8k of RAM? Programs that can run on the bare metal.

I can think of BASIC. The 4k Altair BASIC should be possible to por= t.
Is there a small Forth available?

/Ma= ttis



Den tis 4 apr. 2023 kl 11:08 skrev = SBC-85 <craig@sbc-85.com>:
=
Doesn=E2=80=99t surprise me at all.= =C2=A0 The code made no sense without the IN reading the port.=C2=A0
<= div dir=3D"ltr">
On Apr 4, 2023, at 12:14 AM, = Mattis Lind <m= attislind@gmail.com> wrote:

=EF=BB=BF
Hello!

I just compared the code for version 3 of the monitor (htt= ps://www.retrotechnology.com/restore/beech_mon80.lst) and it has the IN= instruction:

 01223 3EA5 E5		CIN2	PUSH	H		;3EA5-E5
 01224 3EA6 21 0003 		LXI	H,IOBYTE	;3EA6-21 03 00 *
 01225 3EA9 7E			MOV	A,M		;3EA9-7E
 01226 3EAA E6 0C		ANI	00CH		;3EAA-E6 0C
 01227 3EAC C2 3ED1 		JNZ	A3ED1		;3EAC-C2 D1 3E *
 01228 3EAF 3E 09		MVI	A,009H		;3EAF-3E 09
 01229 3EB1 D3 01		OUT	001H		;3EB1-D3 01
 01230 3EB3 3E 08		MVI	A,008H		;3EB3-3E 08
 01231 3EB5 D3 01		OUT	001H		;3EB5-D3 01
 01232 3EB7 26 FA		MVI	H,0FAH		;3EB7-26 FA
 01233 3EB9 DB 01	A3EB9	IN	001H		;3EB9-DB 01
 01234 3EBB E6 01		ANI	001H		;3EBB-E6 01
 01235 3EBD CA 3ECB 		JZ	A3ECB		;3EBD-CA CB 3E *
 01236 3EC0 CD 3D25 		CALL	A3D25		;3EC0-CD 25 3D *
 01237 3EC3 25			DCR	H		;3EC3-25
 01238 3EC4 C2 3EB9 		JNZ	A3EB9		;3EC4-C2 B9 3E *
 01239 3EC7 AF		A3EC7	XRA	A		;3EC7-AF
 01240 3EC8 37			STC			;3EC8-37
 01241 3EC9 E1			POP	H		;3EC9-E1
 01242 3ECA C9			RET			;3ECA-C9
 01243			;************
 01244 3ECB DB 00	A3ECB	IN	000H		;3ECB-DB 00
 01245 3ECD 2F			CMA			;3ECD-2F
 01246 3ECE B7			ORA	A		;3ECE-B7
 01247 3ECF E1			POP	H		;3ECF-E1
 01248 3ED0 C9			RET			;3ED0-C9

Another difference is that the H value is set to FAh instead of FFh and =
that the delay routine is called only once.
I will make a check this evening just to be sure=
: Stepping through until I get to the JZ instruction and then making sure n=
othing has been received by the UART. Let's see if that branch is taken=
 or not.

It sure does look li=
ke a bug. But why did they introduce that bug in version 4? Generally this =
would not be code that there was any reason to change. It has been there in=
 several revisions of the code. Version 3 looks the same as version 2, whil=
e version 1.0 and 1.2 are very different.

Just to explain the behaviour of the Reader-run signal:
<=
pre style=3D"color:rgb(0,0,0);white-space:pre-wrap">
Reader run is generated by a flip-f=
lop constructed out of two 7400. One of the inputs for this flip-flop is th=
e received data. Thus a start-bit would reset the flip-flop which makes sen=
se. The other input is the data coming from the inverting control register.=
 To set the flip-flop the output has to go low and writing a 1 to bit 0 of =
the control register accomplishes that. Now there is one more thing to it. =
The output of the flip-flop is gated in a 7400 with the set-signal from the=
 control-register. To enable the reader relay the signal from this last NAN=
D gate has to be low. This would lower the base of a 2n2907 and then let th=
e current flow through the coil.
When setting bit 0 to 1 the output of the set-signal will b=
e low, causing the flip-flop to output high. This is NANDed with the set-si=
gnal to produce a high. But when bit 0 is set to 0 the output set-signal wi=
ll be high and the flip-flop is still maintaining its high output, thus pro=
ducing a low output of the NAND gate which will then cause current to flow =
in the reader relay coil.

/Ma=
ttis

Den m=C3=A5n 3 apr. 2023 kl 23:56 skrev <craig@sbc-85.com>:
<= blockquote class=3D"gmail_quote" style=3D"margin:0px 0px 0px 0.8ex;border-l= eft:1px solid rgb(204,204,204);padding-left:1ex">
<= div>

=E2=80=A6 a couple of things I forgot=E2=80=A6.<= u>

=C2=A0

which interface board are we talking about controlling the TTY?= =C2=A0=C2=A0does it just have the TTY interface or does it also have a tap= e reader interface?

=C2=A0

the TTY tape reader would only be at 110 ba= ud, maybe 300.=C2=A0 either way, the 8080 had no trouble keeping up with a = standard TTY and I think sending the 08 to the command register to only adv= ance the tape one character would be unnecessary.=C2=A0 so maybe the MVI A,= 08H was a bit of legacy code from the 8008 that just didn=E2=80=99t get rem= oved?=C2=A0 the high speed reader may be more difficult for the 8080 to kee= p up without stopping the tape, especially with a UART doing the dirty work= for the 8080.

=C2=A0=

since you proposed it again, --the 8080 OUT does= not change the value of the accumulator or any flags.

=C2=A0

From: craig@sbc-85.com <craig@sbc-85.com> Sent: Monday, April 3, 2023 2:30 PM
To: 'Mattis Lind&= #39; <mattisli= nd@gmail.com>
Cc: 'Sid Jones' <jonesthechip@logicmagic.= co.uk>; 'Jon Hales' <jonhales@gmail.com>
Subject: RE: Intel= lec 8/80 reading paper tapes?

=C2=A0

Hi Mattis,<= /u>

=C2=A0

what caught my eye was your comment about sending the 08 out to the port = when that makes no sense.

= =C2=A0

=C2=A0

RI0:=C2=A0 = MVI A,BS=C2=A0 =C2=A0 =C2=A0 ;3EC5-3E 08
=C2=A0 =C2=A0 =C2=A0 OUT TTYS= =C2=A0 =C2=A0 =C2=A0 ;3EC7-D3 01=C2=A0 =C2=A0 =C2=A0 <-- SET READER RUN<= br>=C2=A0 =C2=A0 =C2=A0 MVI H,0FFH=C2=A0 =C2=A0 ;3EC9-26 FF
=C2=A0 =C2= =A0 =C2=A0 ANI 001H=C2=A0 =C2=A0 =C2=A0 ;3ECB-E6 01=C2=A0 =C2=A0 =C2=A0 <= ;-- AND A with 01h But isn't A just 08h?
=C2=A0 =C2=A0 =C2=A0 JZ RI2= =C2=A0 =C2=A0 =C2=A0 =C2=A0 ;3ECD-CA DE 3E=C2=A0 =C2=A0<-- Jump on 0. Al= ways take this?
=C2=A0 =C2=A0 =C2=A0 CALL DELAY=C2=A0 =C2=A0 ;3ED0-CD 37= 3D=C2=A0 =C2=A0<-- When do we get here?
=C2=A0 =C2=A0 =C2=A0 CALL DE= LAY=C2=A0 =C2=A0 ;3ED3-CD 37 3D
=C2=A0 =C2=A0 =C2=A0 DCR H=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0;3ED6-25
=C2=A0 =C2=A0 =C2=A0 JNZ RI0=C2=A0 =C2=A0 = =C2=A0 =C2=A0;3ED7-C2 C5 3E=C2=A0 =C2=A0<-- It makes no sense looping if= we aren't reading some condition!

=C2=A0

so lets look at t= hat part of the code.. you say there isn=E2=80=99t an IN instruction, but I= just don=E2=80=99t see this making sense without it=E2=80=A6=

=C2=A0

t= here is only one bit difference between an out and in instruction.=C2=A0 Ou= t is D3 and IN is DB.=C2=A0 so if bit 3 were misread as a low when it was h= igh, then that out TTYS would become an IN TTYS.=C2=A0 but then the instruc= tion before doesn=E2=80=99t make sense to load the accumulator and then ign= ore it.=C2=A0 so something is fishy in that region of code

=C2=A0

I gl= anced at the intellect 8 mod 80 user manual (pasted below), on that bit 3 e= nables/disables a PROM of some sort=E2=80=A6 I didn=E2=80=99t dig further, = but it seems that bit does something and should be left set.=C2=A0 =C2=A0it= was just set in this instruction a few bytes earlier

=C2=A0 =C2=A0 =C2=A0 MVI A,HT=C2=A0 =C2=A0 =C2=A0 = ;3EC1-3E 09
=C2=A0 =C2=A0 =C2=A0 OUT TTYS=C2=A0 =C2=A0 =C2=A0 ;3EC3-D3 0= 1=C2=A0 =C2=A0 =C2=A0 <-- CLEAR READER RUN

=C2=A0

according = to the manual, the 09 will enable the prom and the reader, and 08 will disa= ble the reader but leave the prom enabled.=C2=A0 So, in practice, the reade= r is turned on for a moment and then turned off. =C2=A0are your set reader = run and clear reader run comments backwards?=C2=A0 09h starts the reader, 0= 8h stops the reader.

=C2=A0<= u>

I stand by a missing IN instruction.=C2=A0= Either the OUT was read incorrectly and is actually an IN and the MVI A,08= does nothing, or another bit or two was read wrong and the MVI A,08 is som= ething else entirely.

=C2=A0=

<image001.png>

=C2=A0

=C2=A0

=C2=A0

=C2=A0<= /u>

From: Mattis Lind <mattislind@gmail.com>
Sent: Monday, Ap= ril 3, 2023 1:19 PM
To: craig@sbc-85.com
Cc: Sid Jones <jonesthechip@logicmag= ic.co.uk>; Jon Hales <jonhales@gmail.com>
Subject: Re: Intellec 8/8= 0 reading paper tapes?

=C2=A0

Hello Craig!

=C2=A0

This is the actual=C2=A0monitor that came with my system. Disas= sembled=C2=A0by Bill Beech. The full disassembly=C2=A0can be found here:=

=C2=A0

=C2=A0

I double checked th= e instruction opcodes while single stepping through and it matches just fin= e so I think the disassembly is faithful to the original.=C2=A0

=C2=A0

=

Actually BS/HT are not characters since it goes into= the control register at IO address 1. I have=C2=A0no idea why bit 3 is set= since there is nothing on the IO board that is using that particular=C2=A0= bit. 01h should have been sufficient.

=C2=A0

Wr= iting a 0 to bit 0 in the control register=C2=A0will reset the reader run s= ignal and writing a 1 to bit 0 of the control register will set the reader = run signal.=C2=A0

I full= y agree that there should have been an IN TTYS just before the ANI. Then I = would have understood everything. Now there is none.

=C2=A0

The Data Available signal in the status register is actually=C2= =A0the inverted sense since the Intel 8234 has inverting outputs meaning th= at bit 0 of the status register has 0 if there is data available and 1 if t= here is no data available.=C2=A0

=C2=A0

My only = explanation is that in fact the status register is read into the A register= by the OUT instruction, then anded=C2=A0with 01h and subsequently acted up= on when the JZ is executed. Since we in fact have data in the UART register= the DA status bit will read 0 and the jump will be taken.

=C2=A0

But it should not be possible if the OUT only do OUT and = nothing else, or?

=C2=A0

Perhaps someone can do = an experiment on some other hardware to see what is going on?=

=C2=A0

/Mattis

=C2=A0

=C2= =A0

Den m=C3=A5n 3 apr. 2023 kl = 21:50 skrev <craig= @sbc-85.com>:

Hi Mattis,

=C2= =A0

I must have fallen asleep in cl= ass and just woke up when the teacher called me=E2=80=A6. where did this co= de come from?

=C2=A0<= /p>

I have not taken a careful look, really just look= ed at your comments and confusion set in right when I got to RI0 where you = point out that moving the BS character into A and then ANI with 0x01 makes = absolutely no sense.=C2=A0 How much confidence do we have in this code? is = there an original list file for this code? =C2=A0=C2=A0If this is code that= was read from a ROM and not actually tested, is it a misread or bit rot?

=C2=A0

to answer your question, the OUT instruction leaves register A u= nchanged and affects no flags.

=C2= =A0

looking at the code, everything= in the RI: and RI0: makes sense at first blush.=C2=A0 if I had to accuse s= omething, I would say there is a missing IN TTYS instruction before the ANI= 01H.=C2=A0 is that possible?

=C2= =A0

regards

craig

=C2=A0

=C2=A0

=C2=A0

From: Mattis Lind <mattislind@gmail.com> Sent: Monday, April 3, 2023 11:05 AM
To: SBC-85 <craig@sbc-85.com>; = Sid Jones <jonesthechip@logicmagic.co.uk>; Jon Hales <jonhales@gmail.com>
Su= bject: Intellec 8/80 reading paper tapes?

=C2=A0

Hello!=

=C2=A0

It has been a while. I got side tracked with a= nother project. A guy donated a SWTPC 6809 machine with a terminal and flop= py drives. Nice little system, but not working yet and very dusty when I re= ceived it so it required some attention.

=C2=A0

= After I got the Intellec=C2=A08 running I designed a small current-loop int= erface for it and thought a paper tape simulator would be a good idea. An S= TM32 controller with a small SD card would allow me to have a bunch=C2=A0of= images to select from. As soon as the Intellec=C2=A08 asserts the reader r= un signal a menu would be printed on the terminal connected to the paper ta= pe emulator showing what files there are on the SD card so you could select= one for downloading into the Intellec=C2=A08.

=

=C2=A0

Until here everything works fine. But when the reading process starts= ,=C2=A0 it stops after 20 characters. I did a try to single step through th= e code while receiving characters and then it=C2=A0worked much better. I wa= sn't able to finish the entire file, but it got well past 20 characters= of input until I got too tired of pressing the STEP switch repeatedly.<= /u>

=C2=A0

So what could cause this? This all sounds li= ke some kind of timing problem. But I wanted to be sure before re-designing= the software.

=C2=A0=

I now single stepped throu= gh the code while keeping track of it in the assembly listing I had of the = monitor running.

=C2=A0<= u>

This is the section whic= h is pulsing the Reader Run and reading one byte:

=C2=A0

RI:=C2=A0 =C2= =A0PUSH H=C2=A0 =C2=A0 =C2=A0 =C2=A0 ;3EB7-E5=C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 <-- ENTRY
=C2=A0 =C2=A0 =C2=A0 LXI H,IOBYTE=C2=A0 ;3EB8-21 03 = 00
=C2=A0 =C2=A0 =C2=A0 MOV A,M=C2=A0 =C2=A0 =C2=A0 =C2=A0;3EBB-7E
= =C2=A0 =C2=A0 =C2=A0 ANI 00CH=C2=A0 =C2=A0 =C2=A0 ;3EBC-E6 0C
=C2=A0 =C2= =A0 =C2=A0 JNZ RI3=C2=A0 =C2=A0 =C2=A0 =C2=A0;3EBE-C2 E4 3E
=C2=A0 =C2= =A0 =C2=A0 MVI A,HT=C2=A0 =C2=A0 =C2=A0 ;3EC1-3E 09
=C2=A0 =C2=A0 =C2=A0= OUT TTYS=C2=A0 =C2=A0 =C2=A0 ;3EC3-D3 01=C2=A0 =C2=A0 =C2=A0 <-- CLEAR = READER RUN

RI0:=C2=A0 MVI A,BS=C2=A0 =C2=A0 =C2=A0 ;3EC5-3E 08
= =C2=A0 =C2=A0 =C2=A0 OUT TTYS=C2=A0 =C2=A0 =C2=A0 ;3EC7-D3 01=C2=A0 =C2=A0 = =C2=A0 <-- SET READER RUN
=C2=A0 =C2=A0 =C2=A0 MVI H,0FFH=C2=A0 =C2= =A0 ;3EC9-26 FF
=C2=A0 =C2=A0 =C2=A0 ANI 001H=C2=A0 =C2=A0 =C2=A0 ;3ECB-= E6 01=C2=A0 =C2=A0 =C2=A0 <-- AND A with 01h But isn't A just 08h?=C2=A0 =C2=A0 =C2=A0 JZ RI2=C2=A0 =C2=A0 =C2=A0 =C2=A0 ;3ECD-CA DE 3E=C2= =A0 =C2=A0<-- Jump on 0. Always take this?
=C2=A0 =C2=A0 =C2=A0 CALL = DELAY=C2=A0 =C2=A0 ;3ED0-CD 37 3D=C2=A0 =C2=A0<-- When do we get here?=C2=A0 =C2=A0 =C2=A0 CALL DELAY=C2=A0 =C2=A0 ;3ED3-CD 37 3D
=C2=A0 =C2= =A0 =C2=A0 DCR H=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0;3ED6-25
=C2=A0 =C2=A0= =C2=A0 JNZ RI0=C2=A0 =C2=A0 =C2=A0 =C2=A0;3ED7-C2 C5 3E=C2=A0 =C2=A0<--= It makes no sense looping if we aren't reading some condition!

= RI1:=C2=A0 XRA A=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0;3EDA-AF
=C2=A0 =C2=A0= =C2=A0 STC=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0;3EDB-37
=C2=A0 =C2= =A0 =C2=A0 POP H=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0;3EDC-E1
=C2=A0 =C2=A0= =C2=A0 RET=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0;3EDD-C9

RI2:=C2= =A0 IN TTYD=C2=A0 =C2=A0 =C2=A0 =C2=A0;3EDE-DB 00=C2=A0 =C2=A0 =C2=A0 <-= - Get here then and read data
=C2=A0 =C2=A0 =C2=A0 CMA=C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0;3EE0-2F
=C2=A0 =C2=A0 =C2=A0 ORA A=C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0;3EE1-B7
=C2=A0 =C2=A0 =C2=A0 POP H=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0;3EE2-E1
=C2=A0 =C2=A0 =C2=A0 RET=C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0;3EE3-C9=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0<-- Re= turn to caller.

= =C2=A0

The routine=C2=A0= above is called from this small routine:

=C2=A0

RIX:=C2=A0 CALL RI=C2=A0 =C2= =A0 =C2=A0 =C2=A0;3F12-CD B7 3E
=C2=A0 =C2=A0 =C2=A0 JC=C2=A0 =C2=A0LER= =C2=A0 =C2=A0 =C2=A0 ;3F15-DA 67 3C=C2=A0 <-- If carry we bail out to 3C= 67h
=C2=A0 =C2=A0 =C2=A0 ANI=C2=A0 07FH=C2=A0 =C2=A0 =C2=A0;3F18-E6 7F

=C2=A0 =C2=A0 =C2=A0 RET=C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0;3F1A-C9=C2=A0

=C2=A0

=C2=A0

The code at 3C67 simply prints a '*= ' and jumps to the START of the monitor which prints a CRLF and a '= .' then it is the command interpreter again.

=C2=A0

The IO b= oard has two addresses. 0 and 1

=C2=A0

0 is the data buffer=C2= =A0

1 is the control / status register= .

=C2=A0

Status register has bits allocated as follows:

=C2=A0

<= /div>

0=C2=A0 =C2=A0DA - DataAvailable=C2=A0

1=C2=A0 =C2=A0OR - OverRun

2=C2= =A0 =C2=A0TBMT - TransmitterBuffereMpTy

=

= 3=C2=A0 =C2=A0FE=C2=A0 =C2=A0- FramingError

<= div>

4=C2=A0 =C2=A0PE=C2=A0 =C2=A0- ParityError

=C2=A0

Control = register has one single bit used:

=C2=A0

= 0=C2=A0 =C2=A0Reader Ru= n

=C2=A0

I am not an 8080 assembly specialist. I think I can read it de= cently but the code above puzzles me a bit and I think it has to do with wh= y it doesn't work.

=C2=A0

So I ask you 8080 experts out there if yo= u could give some help understanding what is happening!

=C2=A0

<= p class=3D"MsoNormal">BTW. The= full disassembly=C2=A0is here:=C2=A0https://www.retrotechno= logy.com/restore/mon80_v4.asm

I sent the ROMs and Bill Beech ran it through his disassembler.

=C2=A0

<= /div>

There is a delay routine that loops 256 ti= mes through two delay routines to give some delay but since we are single s= tepping=C2=A0we never get into that one I guess. But how can the A register= have anything other than 08h in it after the OUT=C2=A0 instruction?=

=C2=A0

=

Unless of course the OUT instruction does an im= plicit input into the A register after the OUT??

Then it would read the DA flag and it makes much m= ore sense.

=C2=A0=

But I have not seen any 8080 m= anual stating that the OUT instruction also does an IN implicitly.=C2=A0=

=C2=A0

What am I missing? How should I interpret t= he assembly code?

=C2=A0=

If it indeed turns out = that the STM32 is slow at times, it is indeed looping through quite some co= de when polling the reader run bit and also reads stuff off the SD-card, th= en I will probably enable hardware handshake on the UART and hopefully it w= ill solve it. But understanding if this is the root cause or not would be h= elpful.

=C2=A0=

Any input would be very helpful!<= u>

=C2=A0

=

Thanks!

=C2=A0

/Mattis

=C2=A0

=C2=A0

--00000000000099a27c05f89c4619--