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Sun, 12 Mar 2023 21:03:35 +0000 Date: Sun, 12 Mar 2023 21:03:34 +0000 (UTC) From: Fred van Kempen To: "craig@sbc-85.com" Message-ID: <2046772667.1565506.1678655014836@mail.yahoo.com> In-Reply-To: <148b01d95518$d3ab8670$7b029350$@sbc-85.com> References: <795465721.1480428.1678597808696@mail.yahoo.com> <76DA0C16-49B7-4D49-B346-89D62ED12F63@sbc-85.com> <1273087909.1506672.1678620503916@mail.yahoo.com> <148b01d95518$d3ab8670$7b029350$@sbc-85.com> Subject: Re: interrupt assertion level MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="----=_Part_1565505_643710450.1678655014835" X-Mailer: WebService/1.1.21284 YMailNorrin Content-Length: 5337 X-Spam-Status: No, score=-0.2 X-Spam-Score: -1 X-Spam-Bar: / X-Spam-Flag: NO ------=_Part_1565505_643710450.1678655014835 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable > I made a mistake originally in having all=C2=A0 bus interrupt signals bei= ng active low."high".=C2=A0 > these should have all been active low so they can be open collector and a= nyone> on the bus can assert. should we change that now?Yes.=C2=A0 So: 8080: INT active-high 8085: RST5.5,6.5,7.5,INTR,NMI,TRAP active-high Z80:=C2=A0 INT,NMI active-low 6502: IRQ,NMI active-low 6800: IRQ,NMI active-low 6809: NMI,IRQ,FIRQ active-low 8088/8086/V20/V30: NMI,INT active-high Looks like all the Intel chips are active-high, the rest are low. For signal stability and allowing to have lines shared, I agree we wouldhav= e to change them to active-low on the bus.=C2=A0 This means a change tothe = 8085 board to make them such.=C2=A0 On the Z80 card, Guus already usesthe T= RAP pin for NMI#, and he uses an extra pin for his INT#.=C2=A0 So, he=20 would have to re-wire his INT# pin onto our INTR pin, which will berenamed = to IRQ# then. > As long as a system is self consistent the assertion can be either way,> = but going forward I would like things to migrate towards active low.Yes, an= d, where possible, rename to common-denominator names, so,INTR->IRQ, TRAP->= NMI etc. *smirk* you do realize that you then WILL be doing another CPU card rev, ri= ght? :) --fred =C2=A0 =20 ------=_Part_1565505_643710450.1678655014835 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable
> I made a mistake originally in having all  bus= interrupt signals being active low.
"high".
 
<= div>> these should have all been active low so they can be open collecto= r and anyone
> on the bus can assert. should we change that no= w?
Yes.  So:

8080: INT active-high

8085: RS= T5.5,6.5,7.5,INTR,NMI,TRAP active-high

= Z80:  INT,NMI active-low

6502: IRQ,= NMI active-low

6800: IRQ,NMI active-low

6809: NMI,IRQ,FIRQ active-low
=
8088/8086/V20/V30: NMI,INT= active-high

Looks like all the Intel chips are active-hi= gh, the rest are low.

For signal stability and allowing t= o have lines shared, I agree we would
have to change them to active-low on the bus.  This means a cha= nge to
the 8085 board to make t= hem such.  On the Z80 card, Guus already uses
the TRAP pin for NMI#, and he uses an extra pin for his= INT#.  So, he
would = have to re-wire his INT# pin onto our INTR pin, which will be
renamed to IRQ# then.

> As long as a system is self consi= stent the assertion can be either way,
> but going forward I w= ould like things to migrate towards active low.
Yes, and, where possible, rename to common-denominator nam= es, so,
INTR->IRQ, TRAP->= NMI etc.

*smirk* you do realize that you then WILL be doi= ng another CPU card rev, right? :)

--fred

 

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